Analysis and modeling of dynamic error in currentsteering DAC

SI Hongwei, HE Lenian
 (Department of VLSI Institute， Zhejiang University， Hangzhou 310027， China)

Abstract: The challenge has been imposed on the circuit designers to come up with a high speed currentsteering digital to analog converter(DAC) with high dynamic performance which is widely used in broadband wireless communication systems. The nonideal switching behavior of the current switch is the important source of the dynamic error which results in great harmonic distortion in currentsteering DAC. This phenomena was analyzed and deduced to achieve a formula to describe the relationship among amplitude of harmonic distortion, parameters of the designed DAC circuit and the employed encoding scheme. A behavioral model of currentsteering DAC was built in Matlab to estimate the impact of the nonideal switching behavior on DACs spuriousfree dynamic range（SFDR）. The model was verified by comparing the simulation results of behavioral model with that of a 12bit transistorlevel currentsteering DAC circuit. Simulation results of behavioral model were analyzed to acquire important guide line for currentsteering DAC circuit design.
Key words: currentsteering digital to analog converter(DAC); dynamic error; spurious free dynamic range(SFDR); modeling