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Dynamic speed estimation method based on FPGA
Published:2014-01-23 author:MA Ze, HU Xudong, YANG Liangliang Browse: 3143 Check PDF documents

Dynamic speed estimation method based on FPGA


MA Ze, HU Xudong, YANG Liangliang

(School of Machinery and Automatic Control, Zhejiang SciTech University, Hangzhou 310018, China)


Abstract: Aiming at the problems of the poor accuracy and the serious lag in the conventional methods of measuring velocity, a new dynamic estimated method for velocity estimating based on the common M/T method was proposed. This method was designed with field programmable gate array(FPGA) for its powerful digital processing ability and the feedback signals of the incremental photoelectric encoder were quadrupled. The time constant, counting and other related modules were designed by using the verilog HDL programming language. The idea that the incomplete pulses were estimated by using decimals was adopted. The velocity which was calculated by using the dynamic estimated methods should pass through a lowpass first order filter. The results indicate that, no matter whether velocity is low or high, this method improves the accuracy and reduces hysteresis, and the hysteresis can be controlled in a certain range.

Key words: M/T method; fieldprogrannnble gate array(FPGA); estimation of velocity


 

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