Variable frequency driver system of asynchronous motor based on FPGA

WU Jun1， QIU Jian-qi1， SHI Cen-wei1， WANG Li2
（1. College of Electrical Engineering， Zhejiang University， Hangzhou 310027， China；
2. Fundamental Education Department， Anhui Medical College， Hefei 230601， China）

Abstract： Aiming at the slow speed and poor stability of control system designed by traditional micro control unit（MCU）or digital signal processor（DSP）in the way of software，a hardware designed scheme of space vector pulse width modulation（SVPWM） based on field programmable gate array（FPGA）was presented，which based on the background of full digital motor-controller. Combining complished EDA design methodology and Verilog HDL，it was verified and implemented on one-chip FPGA. The “top-down” theme was used to develop core by dividing system according to it's function in the design. It was realized that，at first，design and simulation on single module，secondly，on the whole system，at last verification using FPGA. The algorithm was proved feasible through the simulation and experiment. On the basis of the platform，V/F open loop speed regulation system experiment was completed. The results indicate that the system has excellent stablity characteristic，reasonable chip utility，good reusability，superiority that the MCU and DSP do not have in real time，flexibility etc.， and lays the foundation for the design of a special motor-controlling chip.
Key words： asynchronous motor； field programmable gate array（FPGA）；V/F driver system；space vector pulse width modulation（SVPWM）