ZHU Yuan jian, ZHANG Hua

 

(Zhejiang Sci Tech University, Faculty of Mechanical Engineering & Automation, Hangzhou 310018, China)

 

 

Abstract: Aiming at controlling servo motor stably ,the research concerning pulse sending module ,counting module and deceleration module were conducted. By analyzing the pulse signal generating process, a kind of wide tuning range of pulse generator based on FPGA was introduced, which is a direct digital frequency synthesis alogorithm (DDS) by using Verilog HDL hardware description language to implement the logic of the algorithm. Also the projects use Quartus II simulation software to test the pulse signal and deceleration counting module. The results indicate that the pulse frequency is adjustable from 1Hz to 25MHz, and the entire pulse period fluctuation does not exceed one clock cycle. The PWM module can be uniform and stable with high resolution and the wide range of frequency. The module can meet a variety of servo control requirements with very good prospects.

 

Key words: direct digital synthesis; pulse edge count; Finite state machine; fpga