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Design and implementation of data rate and format conversion based on FPGA
Published:2012-05-29 author:WANG Ling, WANG Chen-ping, LI Dao-hu Browse: 3803 Check PDF documents

Design and implementation of data rate and format conversion based on FPGA

WANG Ling, WANG Chen-ping, LI Dao-hu
(Xinxiang No. 760 Factory, Xinxiang 453009, China)

Abstract: In order to solve the problem of the conversion from continuous data to fixed-length frame in the digital communication, the interface conversion module based on field-programmable gate array(FPGA) with the function of data rate and structure transformation was designed,including three important parts:cache unit,rate conversion and frame control logic. The convenient asynchronous FIFO was selected to achieve the function of cache unit. The five-sixths fractional frequency was used for the rate conversion unit to save the FPGA resource. The read enable format and time sequence of FIFO were defined by the frame control logic unit strictly. The time sequence and the function of the software were simulated finally. The practical application shows that the module can finish the conversion of data rate and structure transformation accurately,and achieve the expected function.
Key words: digital communication;rate conversion;FIFO;frame control logic;field-programmable gate array(FPGA)
 

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